The Synchronous Dataflow MAchine: Architecture and performance
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In this paper a parallel computer architecture for real time image processing is described. The architecture centers on the direct mapping of a static dataflow graph into hardware: each node (or group of nodes) is replaced by a processing element
| # | Istituto/Sede | Collocazione | Inventario patrimoniale |
|---|---|---|---|
| Area della ricerca di Genova, Servizio di Documentazione Scientifica | Sede di Genova |
