Multi–level simulator for VLSI on the parallel object–oriented machine
Si trova su / Altri legami
Simulation is a key element in modern and future digital circuit design. However, simulation becomes a bottleneck with increasing design complexity. There are mainly two ways to get out of this situation: reduction of the simulation load through multi–level simulation and acceleration of the simulation through exploitation of parallelism
| # | Istituto/Sede | Collocazione | Inventario patrimoniale |
|---|---|---|---|
| Area della ricerca di Genova, Servizio di Documentazione Scientifica | Sede di Genova |
